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ath9k_hw: fix fast clock handling for 5GHz channels

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Combine multiple checks that were supposed to check for the same
conditions, but didn't. Always enable fast PLL clock on AR9280 2.0

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Felix Fietkau 2010-04-26 15:04:35 -04:00 • committed by John W. Linville
commit 6b42e8d03b
5 changed files with 18 additions and 20 deletions
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