RISC-V: Provide a fraemework for RISC-V ISA extensions

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This series implements a generic framework to parse multi-letter ISA
extensions.

* palmer/riscv-isa:
  RISC-V: Improve /proc/cpuinfo output for ISA extensions
  RISC-V: Do no continue isa string parsing without correct XLEN
  RISC-V: Implement multi-letter ISA extension probing framework
  RISC-V: Extract multi-letter extension names from "riscv, isa"
  RISC-V: Minimal parser for "riscv, isa" strings
  RISC-V: Correctly print supported extensions

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Palmer Dabbelt 2022-03-17 14:09:16 -07:00

parent 9d1f0ec9f7 a9b202606c

commit 6b57ac02b4

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3 changed files with 195 additions and 23 deletions

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25

arch/riscv/include/asm/hwcap.h

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65

arch/riscv/kernel/cpu.c

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128

arch/riscv/kernel/cpufeature.c

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