riscv: Include riscv_set_icache_flush_ctx prctl

Support new prctl with key PR_RISCV_SET_ICACHE_FLUSH_CTX to enable optimization of cross modifying code. This prctl enables userspace code to use icache flushing instructions such as fence.i with the guarantee that the icache will continue to be clean after thread migration. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Link: https://lore.kernel.org/r/20240312-fencei-v13-2-4b6bdc2bbf32@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2026-10-22 19:14:51 +00:00 · 2024-03-12 16:53:41 -07:00 · 2024-03-12 16:53:41 -07:00 · 6b9391b581
commit 6b9391b581
parent bebc345413
7 changed files with 171 additions and 8 deletions
--- a/arch/riscv/include/asm/mmu.h
+++ b/arch/riscv/include/asm/mmu.h
--- a/arch/riscv/include/asm/processor.h
+++ b/arch/riscv/include/asm/processor.h
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
--- a/arch/riscv/mm/context.c
+++ b/arch/riscv/mm/context.c
--- a/include/uapi/linux/prctl.h
+++ b/include/uapi/linux/prctl.h
--- a/kernel/sys.c
+++ b/kernel/sys.c