riscv: dts: microchip: update memory configuration for v2022.10

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In the v2022.10 reference design, the seg registers are going to be
changed, resulting in a required change to the memory map in Linux.
A small 4M reservation is made at the end of 32-bit DDR to provide some
memory for the HSS to use, so that it can cache its payload.bin between
reboots of a specific context.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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Conor Dooley 2022-09-27 12:19:23 +01:00

parent d49166646e

commit 6c11933017

1 changed files with 13 additions and 2 deletions

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arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts

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