drm/i915: Add fault address to error state for gen8 and gen9

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The faulting virtual address is >32bits and has been moved
to different registers. Add to error state and output upper
register first, in the same line for easy reconstruction of
the fault address.

v2: correct gen masking (Michel)
v3: s/TBL/TLB (Ville)

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Mika Kuoppala 2015-03-24 14:54:19 +02:00 • committed by Daniel Vetter

parent 1d00dad56b

commit 6c826f3495

3 changed files with 15 additions and 0 deletions

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2

drivers/gpu/drm/i915/i915_drv.h

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10

drivers/gpu/drm/i915/i915_gpu_error.c

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3

drivers/gpu/drm/i915/i915_reg.h

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