i2c: piix4: Enable EFCH MMIO for Family 17h+

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Enable EFCH MMIO using check for SMBus PCI revision ID value 0x51 or
greater. This PCI revision ID check will enable family 17h and future
AMD processors with the same EFCH SMBus controller HW.

Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@kernel.org>

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Terry Bowman 2022-02-09 11:27:17 -06:00 • committed by Wolfram Sang

parent 381a3083c6

commit 6cf72f4180

1 changed files with 15 additions and 2 deletions

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drivers/i2c/busses/i2c-piix4.c

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