drm/msm/dp: change clock related programming for YUV420 over DP

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Change all relevant DP controller related programming for YUV420 cases.
Namely, change the pixel clock math to consider YUV420 and modify the
MVID programming to consider YUV420.

Changes in v2:
	- Move configuration control programming to a different commit
	- Slight code simplification
	- Add VSC SDP check when doing mode_pclk_khz division in
	  dp_bridge_mode_valid

Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/579640/
Link: https://lore.kernel.org/r/20240222194025.25329-12-quic_parellan@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

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This commit is contained in:

Paloma Arellano 2024-02-22 11:39:56 -08:00 • committed by Dmitry Baryshkov

parent 683d374582

commit 6db6e56065

4 changed files with 15 additions and 5 deletions

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5

drivers/gpu/drm/msm/dp/dp_catalog.c

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2

drivers/gpu/drm/msm/dp/dp_catalog.h

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9

drivers/gpu/drm/msm/dp/dp_ctrl.c

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4

drivers/gpu/drm/msm/dp/dp_display.c

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