KVM: vmx: Emulate MSR IA32_UMWAIT_CONTROL

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UMWAIT and TPAUSE instructions use 32bit IA32_UMWAIT_CONTROL at MSR index
E1H to determines the maximum time in TSC-quanta that the processor can
reside in either C0.1 or C0.2.

This patch emulates MSR IA32_UMWAIT_CONTROL in guest and differentiate
IA32_UMWAIT_CONTROL between host and guest. The variable
mwait_control_cached in arch/x86/kernel/cpu/umwait.c caches the MSR value,
so this patch uses it to avoid frequently rdmsr of IA32_UMWAIT_CONTROL.

Co-developed-by: Jingqi Liu <jingqi.liu@intel.com>
Signed-off-by: Jingqi Liu <jingqi.liu@intel.com>
Signed-off-by: Tao Xu <tao3.xu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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Tao Xu 2019-07-16 14:55:50 +08:00 • committed by Paolo Bonzini

parent e69e72faa3

commit 6e3ba4abce

4 changed files with 53 additions and 0 deletions

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6

arch/x86/kernel/cpu/umwait.c

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36

arch/x86/kvm/vmx/vmx.c

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9

arch/x86/kvm/vmx/vmx.h

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2

arch/x86/kvm/x86.c

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