clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks

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[ Upstream commit 19024c9980 ]

All the MFGPLL require MFG_EB to be on for any operation on them, and
they only tick when MFG_EB is on as well, therefore making this a
parent-child relationship.

This dependency wasn't clear during the initial upstreaming of these
clock controllers, as it only made itself known when I could observe
the effects of the clock by bringing up a different piece of hardware.

Add a new PLL_PARENT_EN flag to mediatek's clk-pll.h, and check for it
when initialising the pll to then translate it into the actual
CLK_OPS_PARENT_ENABLE flag.

Then add the mfg_eb parent to the mfgpll clocks, and set the new
PLL_PARENT_EN flag.

Fixes: 03dc02f8c7 ("clk: mediatek: Add MT8196 mfg clock support")
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

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This commit is contained in:

Nicolas Frattaroli 2025-12-15 11:24:02 +01:00 • committed by Greg Kroah-Hartman

parent 1debd9ba7e

commit 6e5379c3b5

3 changed files with 11 additions and 6 deletions

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13

drivers/clk/mediatek/clk-mt8196-mfg.c

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3

drivers/clk/mediatek/clk-pll.c

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1

drivers/clk/mediatek/clk-pll.h

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