drm/xe/memirq: Update interrupt handler logic

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To workaround some corner case hardware limitations, new programming
note for the memory based interrupt handler suggests to assume that
some status bytes, like GT_MI_USER_INTERRUPT and GUC_INTR_GUC2HOST,
are always set. Update our interrupt handler to follow the new rules.

Bspec: 53672
Fixes: a6581ebe76 ("drm/xe/vf: Introduce Memory Based Interrupts Handler")
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Link: https://patch.msgid.link/20260511172838.2299-2-michal.wajdeczko@intel.com
(cherry picked from commit 284f4cae45)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Michal Wajdeczko 2026-05-11 19:28:37 +02:00 • committed by Rodrigo Vivi

parent 5200f5f493

commit 6eb0168d09

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1 changed files with 22 additions and 4 deletions

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drivers/gpu/drm/xe/xe_memirq.c

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