ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3

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Lichee zero plus is a core board made by Sipeed, which includes on-board
TF slot or SMT SD NAND, and optional SPI NOR or eMMC, a UART debug
header, a microUSB slot and a gold finger connector for expansion. It
can use either Sochip S3 or Allwinner S3L SoC.

Add the basic device tree for the core board, w/o optional onboard
storage, and with S3 SoC.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

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Icenowy Zheng 2019-07-28 11:12:27 +08:00 • committed by Maxime Ripard

parent 11d1bdead7

commit 6f002c57c7

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1

arch/arm/boot/dts/Makefile

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53

arch/arm/boot/dts/sun8i-s3-lichee-zero-plus.dts

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