RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN

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Pointer masking is controlled through a WARL field in henvcfg. Expose
the feature only if at least one PMLEN value is supported for VS-mode.
Allow the VMM to block access to the feature by disabling the Smnpm ISA
extension in the guest.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20250111004702.2813013-3-samuel.holland@sifive.com
Signed-off-by: Anup Patel <anup@brainfault.org>

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Samuel Holland 2025-01-10 16:46:59 -08:00 • committed by Anup Patel

parent bb053f816a

commit 6f576fc0ae

3 changed files with 94 additions and 1 deletions

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4

arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h

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1

arch/riscv/kvm/vcpu_onereg.c

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90

arch/riscv/kvm/vcpu_sbi_fwft.c

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