Merge branch 'bpf-arm-jit-improvements'

Browse source

Russell King says:

====================
This series improves the ARM BPF JIT compiler by:

- enumerating the stack layout rather than using constants that happen
  to be multiples of four
- rejig the BPF "register" accesses to use negative numbers instead of
  positive, which could be confused with register numbers in the bpf2a32
  array.
- since we maintain the ARM FP register as a pointer to the top of our
  scratch space (or, with frame pointers enabled, a valid ARM frame
  pointer register), we can access our scratch space using FP, which is
  constant across all BPF programs, including tail-called programs.
- use immediate forms of ARM instructions where possible, rather than
  first loading the immediate into an ARM register.
- use load-with-shift instruction rather than seperate shift instruction
  followed by load
- avoid reloading index and array in the tail-call code
- use double-word load/store instructions where available

Version 2:

- Fix ARMv5 test pointed out by Olof
- Fix build error found by 0-day (adding an additional patch)
====================

Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>

...

This commit is contained in:

Daniel Borkmann 2018-07-12 20:45:23 +02:00

parent b103cbe0d7 8c9602d38c

commit 6fd0666041

2 changed files with 543 additions and 481 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

982

arch/arm/net/bpf_jit_32.c

View file

42

arch/arm/net/bpf_jit_32.h

View file