spi: armada-3700: Fix padding when sending not 4-byte aligned data

Browse source

In 4-byte transfer mode, extra padding/dummy bytes '0xff' would be
sent in write operation if TX data is not 4-byte aligned since the
SPI data register is always shifted out as whole 4 bytes.

Fix this by using the header count feature that allows to transfer 0 to
4 bytes. Use it to actually send the first 1 to 3 bytes of data before
the rest of the buffer that will hence be 4-byte aligned.

Signed-off-by: Zachary Zhang <zhangzg@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

...

This commit is contained in:

Zachary Zhang 2017-09-13 18:21:39 +02:00 • committed by Mark Brown

parent 747e1f6047

commit 6fd6fd68c9

1 changed files with 41 additions and 94 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

135

drivers/spi/spi-armada-3700.c

View file