powerpc/603: Avoid a pile of NOPs when not using SW LRU in TLB exceptions

Browse source

The SW LRU is in an MMU feature section. When not used, that's a
dozen of NOPs to fetch for nothing.

Define an ALT section that does the few remaining operations.

That also avoids a double read on SRR1 in the SW LRU case.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/603725297466959419628ef7964aaf3417fb647d.1620363691.git.christophe.leroy@csgroup.eu

...

This commit is contained in:

Christophe Leroy 2021-05-07 05:02:02 +00:00 • committed by Michael Ellerman

parent c176c3d58a

commit 70d6ebf82b

1 changed files with 14 additions and 4 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

18

arch/powerpc/kernel/head_book3s_32.S

View file