drm/i915: Track GGTT writes on the vma

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As writes through the GTT and GGTT PTE updates do not share the same
path, they are not strictly ordered and so we must explicitly flush the
indirect writes prior to modifying the PTE. We do track outstanding GGTT
writes on the object itself, but since the object may have multiple GGTT
vma, that is overly coarse as we can track and flush individual vma as
required.

Whilst here, update the GGTT flushing behaviour for Cannonlake.

v2: Hard-code ring offset to allow use during unload (after RCS may have
been freed, or never existed!)

References: https://bugs.freedesktop.org/show_bug.cgi?id=104002
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171206124914.19960-2-chris@chris-wilson.co.uk

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This commit is contained in:

Chris Wilson 2017-12-06 12:49:14 +00:00

parent 010e3e68cd

commit 7125397b82

4 changed files with 83 additions and 18 deletions

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2

drivers/gpu/drm/i915/i915_drv.h

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58

drivers/gpu/drm/i915/i915_gem.c

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22

drivers/gpu/drm/i915/i915_vma.c

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19

drivers/gpu/drm/i915/i915_vma.h

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