x86/mm: Flush global TLB when switching to trampoline page-table

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Move the switching code into a function so that it can be re-used and
add a global TLB flush. This makes sure that usage of memory which is
not mapped in the trampoline page-table is reliably caught.

Also move the clearing of CR4.PCIDE before the CR3 switch because the
cr4_clear_bits() function will access data not mapped into the
trampoline page-table.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20211202153226.22946-4-joro@8bytes.org

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Joerg Roedel 2021-12-02 16:32:25 +01:00 • committed by Borislav Petkov

parent f154f29085

commit 71d5049b05

3 changed files with 29 additions and 10 deletions

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1

arch/x86/include/asm/realmode.h

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arch/x86/kernel/reboot.c

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arch/x86/realmode/init.c

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