Two new pll rates and an additional critical clock on rk3568.

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Merge tag 'v6.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull Rockchip clk driver updates from Heiko Stuebner:

Two new pll rates and an additional critical clock on rk3568.

* tag 'v6.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: rk3568: Mark pclk_usb as critical
  clk: rockchip: rk3568: Add PLL rate for 126.4MHz
  clk: rockchip: rk3568: Add PLL rate for 115.2MHz

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This commit is contained in:

Stephen Boyd 2023-12-16 16:28:56 -08:00

parent b85ea95d08 721bf080f2

commit 723facbbb5

1 changed files with 3 additions and 0 deletions

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drivers/clk/rockchip/clk-rk3568.c

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