pinctrl: uniphier: support 3-bit drive strength control

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The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive
strength control.  Drive strength of some pins are controlled by
3-bit width registers (8-level granularity).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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Masahiro Yamada 2016-05-31 17:05:14 +09:00 • committed by Linus Walleij

parent 9eaa98a63c

commit 72e5706aa7

2 changed files with 21 additions and 6 deletions

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25

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

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2

drivers/pinctrl/uniphier/pinctrl-uniphier.h

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