PCI: Disable MSI for HiSilicon Hip06/Hip07 Root Ports

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The PCIe Root Port in Hip06/Hip07 SoCs advertises an MSI capability, but it
cannot generate MSIs.  It can transfer MSI/MSI-X from downstream devices,
but does not support MSI/MSI-X itself.

Add a quirk to prevent use of MSI/MSI-X by the Root Port.

[bhelgaas: changelog, sort vendor ID #define, drop device ID #define]
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>

...

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Dongdong Liu 2017-02-03 15:02:07 -06:00 • committed by Bjorn Helgaas

parent 4788316f74

commit 72f2ff0deb

2 changed files with 3 additions and 0 deletions

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include/linux/pci_ids.h

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