net: hns3: add limit ets dwrr bandwidth cannot be 0

Browse source

If ets dwrr bandwidth of tc is set to 0, the hardware will switch to SP
mode. In this case, this tc may occupy all the tx bandwidth if it has
huge traffic, so it violates the purpose of the user setting.

To fix this problem, limit the ets dwrr bandwidth must greater than 0.

Fixes: cacde272dd ("net: hns3: Add hclge_dcb module for the support of DCB feature")
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

...

This commit is contained in:

Guangbin Huang 2021-10-19 22:16:30 +08:00 • committed by David S. Miller

parent b63fcaab95

commit 731797fdff

1 changed files with 9 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

9

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c

View file