arm64: dts: ti: k3-j721e: Enable PCIe nodes at the board level

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PCIe nodes defined in the top-level J721e SoC dtsi files are incomplete
and will not be functional unless they are extended with a SerDes PHY.
And usually only one of the two modes can be used at a time as they
share a SerDes link.

As the PHY and mode is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the PCIe nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230515172137.474626-3-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

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This commit is contained in:

Andrew Davis 2023-05-15 12:21:35 -05:00 • committed by Vignesh Raghavendra

parent a0cfd88d4a

commit 731c6deda8

4 changed files with 10 additions and 29 deletions

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16

arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts

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7

arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts

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4

arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

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12

arch/arm64/boot/dts/ti/k3-j721e-sk.dts

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