MIPS: Fix TLBR-use hazards for R2 cores in the TLB reload handlers

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MIPS R2 documents state that an execution hazard barrier is needed
after a TLBR before reading EntryLo.

Original patch by Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/5526/

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Ralf Baechle 2013-06-20 14:56:17 +02:00

parent b90b380262

commit 73acc7df53

1 changed files with 26 additions and 0 deletions

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arch/mips/mm/tlbex.c

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