x86/microcode/intel: Establish staging control logic

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When microcode staging is initiated, operations are carried out through
an MMIO interface. Each package has a unique interface specified by the
IA32_MCU_STAGING_MBOX_ADDR MSR, which maps to a set of 32-bit registers.

Prepare staging with the following steps:

  1.  Ensure the microcode image is 32-bit aligned to match the MMIO
      register size.

  2.  Identify each MMIO interface based on its per-package scope.

  3.  Invoke the staging function for each identified interface, which
      will be implemented separately.

  [ bp: Improve error logging. ]

Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Tested-by: Anselm Busse <abusse@amazon.de>
Link: https://lore.kernel.org/all/871pznq229.ffs@tglx

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This commit is contained in:

Chang S. Bae 2025-09-21 15:48:37 -07:00 • committed by Borislav Petkov (AMD)

parent 7cdda85ed9

commit 740144bc6b

2 changed files with 53 additions and 0 deletions

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arch/x86/include/asm/msr-index.h

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51

arch/x86/kernel/cpu/microcode/intel.c

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