drm/i915: Drop posting reads to flush master interrupts

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We do not need to do a posting read of our uncached mmio write to
re-enable the master interrupt lines after handling an interrupt, so
don't. This saves us a slow UC read before we can process the interrupt,
most noticeable in execlists where any stalls imposes extra latency on
GPU command execution.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180628201211.13837-1-chris@chris-wilson.co.uk

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Chris Wilson 2018-06-28 21:12:03 +01:00

parent f7dc0157e4

commit 74093f3ecc

1 changed files with 1 additions and 8 deletions

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drivers/gpu/drm/i915/i915_irq.c

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