RISC-V devicetrees for v7.1

Generic: Add binding coverage for Supm. Microchip: Add support for the picgx64 and its curiosity board. This is a PolarFire SoC without the FPGA. Add the missing tsu_clk for ptp on the macb on PolarFire SoC and resolve a long-running problem with gpio interrupts being incorrectly described on the platform. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCadOI5gAKCRB4tDGHoIJi 0jxXAP94SQeRxMv5UlPaz5qQfsDIDlH3wnPrbaKLkiKxke8QRwEAnv2sNIv6w6e9 b96heW7o3KCEEEha19tFQKqXV5Vcrg4= =1yzS -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v7.1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V devicetrees for v7.1 Generic: Add binding coverage for Supm. Microchip: Add support for the picgx64 and its curiosity board. This is a PolarFire SoC without the FPGA. Add the missing tsu_clk for ptp on the macb on PolarFire SoC and resolve a long-running problem with gpio interrupts being incorrectly described on the platform. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v7.1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: microchip: update mpfs gpio interrupts to better match the SoC riscv: dts: microchip: add tsu clock to macb on mpfs dt-bindings: riscv: Add Supm extension description riscv: dts: microchip: remove POLARFIRE mention in Makefile riscv: dts: microchip: add pic64gx and its curiosity kit dt-bindings: riscv: microchip: document the PIC64GX curiosity kit dt-bindings: timer: sifive,clint: add pic64gx compatibility riscv: dts: microchip: add pinctrl nodes for mpfs/icicle kit Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-11-10 20:48:12 +00:00 · 2026-04-11 10:29:22 +02:00 · 2026-04-11 10:29:22 +02:00 · 746e195d43
commit 746e195d43
parent 17ed8fd2fa b0258f69f1
17 changed files with 1499 additions and 66 deletions
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
--- a/Documentation/devicetree/bindings/riscv/microchip.yaml
+++ b/Documentation/devicetree/bindings/riscv/microchip.yaml
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
--- a/arch/riscv/boot/dts/microchip/Makefile
+++ b/arch/riscv/boot/dts/microchip/Makefile
--- a/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts
+++ b/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts
--- a/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts
+++ b/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts
--- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi
--- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
--- a/arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts
+++ b/arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts
--- a/arch/riscv/boot/dts/microchip/mpfs-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs-pinctrl.dtsi
--- a/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts
+++ b/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts
--- a/arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts
+++ b/arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts
--- a/arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts
+++ b/arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
--- a/arch/riscv/boot/dts/microchip/pic64gx-curiosity-kit.dts
+++ b/arch/riscv/boot/dts/microchip/pic64gx-curiosity-kit.dts
--- a/arch/riscv/boot/dts/microchip/pic64gx-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/microchip/pic64gx-pinctrl.dtsi
--- a/arch/riscv/boot/dts/microchip/pic64gx.dtsi
+++ b/arch/riscv/boot/dts/microchip/pic64gx.dtsi