irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum

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Alex Barba <alex.barba@broadcom.com> discovered Broadcom NS2 GICv2m
implementation has an erratum where the MSI data needs to be the SPI
number subtracted by an offset of 32, for the correct MSI interrupt
to be triggered.

Here we are adding the workaround based on readings from the MSI_IIDR
register, which contains a value unique to Broadcom NS2 GICv2m

Reported-by: Alex Barba <alex.barba@broadcom.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

...

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Ray Jui 2016-05-05 09:32:01 -07:00 • committed by Marc Zyngier

parent 1228d53d3d

commit 74c967aaff

1 changed files with 17 additions and 2 deletions

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drivers/irqchip/irq-gic-v2m.c

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