e1000e: reset the PHY on 82577/82578 when going to Sx

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The PHY on 82577/82578 parts needs a soft reset when transitioning to Sx
state in order for the PHY write which disables gigabit speed to take
effect.  Gigabit speed must be disabled in order for the PHY writes to
registers on page 800 (the wakeup control registers) to work as expected
otherwise the system might not wake via WoL.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

...

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Bruce Allan 2009-10-22 21:22:18 -07:00 • committed by David S. Miller

parent 2bd9af046f

commit 74eee2e8d0

1 changed files with 1 additions and 2 deletions

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3

drivers/net/e1000e/ich8lan.c

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