spi: cadence: Add Marvell SDMA operations

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In Marvell xSPI implementation any access to SDMA register will result
in 8 byte SPI data transfer. Reading less data(eg. 1B) will result in
losing remaining bytes. To avoid that read/write 8 bytes into temporary
buffer, and read/write whole temporary buffer into SDMA.

Signed-off-by: Witold Sadowski <wsadowski@marvell.com>
Link: https://patch.msgid.link/20240724154739.582367-5-wsadowski@marvell.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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Witold Sadowski 2024-07-24 08:47:34 -07:00 • committed by Mark Brown

parent 26d34fdc49

commit 75128e2a14

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drivers/spi/spi-cadence-xspi.c

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