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drm/amd/display: disable dcn315 pixel rate crb when scaling
The rough calculation does not account for scaling. Also, make 2 segments the minimum allowed per surface to avoid potential 0 detile with mpc/odm combine on such outputs. Reviewed-by: Ariel Bernstein <eric.bernstein@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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