bnxt_en: Keep track of reserved IRQs.

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The new 57500 chips use 1 NQ per MSIX vector, whereas legacy chips use
1 CP ring per MSIX vector.  To better unify this, add a resv_irqs
field to struct bnxt_hw_resc.  On legacy chips, we initialize resv_irqs
with resv_cp_rings.  On new chips, we initialize it with the allocated
MSIX resources.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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Michael Chan 2018-12-09 07:01:00 -05:00 • committed by David S. Miller

parent 804fba4e9f

commit 75720e6323

3 changed files with 8 additions and 3 deletions

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8

drivers/net/ethernet/broadcom/bnxt/bnxt.c

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1

drivers/net/ethernet/broadcom/bnxt/bnxt.h

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2

drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c

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