drm/i915/xe2hpd: Add support for eDP PLL configuration

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Tables for eDP PHY PLL configuration for different link rates added for
Xe2_HPD. Previous platforms were using C10 PHY for eDP port whereas
Xe2_HPD has C20 PHY.

v2: Updated with a more appropriate Bspec number.

Bspec: 74165
CC: Clint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240430172850.1881525-8-radhakrishna.sripada@intel.com

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Balasubramani Vivekanandan 2024-04-30 10:28:38 -07:00 • committed by Radhakrishna Sripada

parent 96b0ffecc0

commit 75b87e9f3d

1 changed files with 146 additions and 1 deletions

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drivers/gpu/drm/i915/display/intel_cx0_phy.c

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