mailbox: mpfs: fix an incorrect mask width

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The system controller registers on PolarFire SoC are 32 bits wide, so
16 + 16 as the first input to GENMASK_ULL() gives a 33 bit wide mask.
It probably should have been immediately obvious when it was pointed
out during review that the width required using GENMASK_ULL() - but I
scarcely knew what I was doing at the time and missed it.
The mistake ends up being moot as it is a mask after all, but it is
incorrect and should be fixed.

No functional change intended.

Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Tested-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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This commit is contained in:

Conor Dooley 2023-03-07 20:22:51 +00:00

parent fe15c26ee2

commit 75dfbcbfd7

1 changed files with 2 additions and 1 deletions

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drivers/mailbox/mailbox-mpfs.c

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