drm/i915/ddi: Use power well CTL IDX instead of ID

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Similarly to the previous patch use a separate request/status HW flag
index defined right after the corresponding control registers instead of
depending for this on the power well IDs. Since the set of
control/status registers varies among the different power wells (on a
single platform), also add a new i915_power_well_registers struct that
we populate and assign to each DDI power well as needed.

Also clarify a bit the code comment describing the function and layout
of the control registers.

This also fixes a problem on ICL, where we incorrectly read the KVMR
control register in hsw_power_well_requesters() even for DDI and AUX
power wells.

v2:
- Clarify platform range tags in code comments. (Paulo)
- Fix line over 80 chars checkpatch warning.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180806095843.13294-7-imre.deak@intel.com

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This commit is contained in:

Imre Deak 2018-08-06 12:58:39 +03:00

parent d13dd05a1f

commit 75e39688f3

5 changed files with 361 additions and 118 deletions

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31

drivers/gpu/drm/i915/gvt/handlers.c

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13

drivers/gpu/drm/i915/i915_drv.h

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126

drivers/gpu/drm/i915/i915_reg.h

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5

drivers/gpu/drm/i915/intel_display.c

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302

drivers/gpu/drm/i915/intel_runtime_pm.c

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