dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC

Browse source

Add new compatible strings in cpus.yaml to support the E71 and U74 CPU
cores ("harts") that are present on FU740-C000 SoC.

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>

...

This commit is contained in:

Yash Shah 2020-12-08 10:25:33 +05:30 • committed by Palmer Dabbelt

parent 507308b8cc

commit 75e6d7248e

No known key found for this signature in database

GPG key ID: 2E1319F35FBB1889

1 changed files with 6 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

6

Documentation/devicetree/bindings/riscv/cpus.yaml

View file