drm/i915/display: Split out DG2 MPLLB enable helper

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Refactor the DG2 MPLLB enable path by splitting out a helper that
programs the PHY directly from an intel_mpllb_state.

This is preparatory work for moving DG2 MPLLB handling under the DPLL
framework, where callbacks operate on dpll_hw_state rather than the
full crtc_state.

Assisted-by: Copilot:claude-sonnet-4-6
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
Link: https://patch.msgid.link/20260630115336.1059976-2-mika.kahola@intel.com

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Mika Kahola 2026-06-30 11:53:33 +00:00

parent 533b8c78f1

commit 75eef2123c

2 changed files with 10 additions and 3 deletions

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11

drivers/gpu/drm/i915/display/intel_snps_phy.c

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2

drivers/gpu/drm/i915/display/intel_snps_phy.h

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