clk: socfpga: stratix10: use new parent data scheme

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Convert, where possible, the stratix10 clock driver to the new parent
data scheme by specifying the parent data for clocks that have multiple
parents.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200512181647.5071-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Dinh Nguyen 2020-05-12 13:16:43 -05:00 • committed by Stephen Boyd

parent 8f3d9f3542

commit 762d961aee

5 changed files with 146 additions and 41 deletions

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5

drivers/clk/socfpga/clk-gate-s10.c

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10

drivers/clk/socfpga/clk-periph-s10.c

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4

drivers/clk/socfpga/clk-pll-s10.c

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152

drivers/clk/socfpga/clk-s10.c

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8

drivers/clk/socfpga/stratix10-clk.h

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