[Blackfin] arch: fix bug when DMA operation related core B of BF561

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- Before DMA'ing data to core B L1 memory, caches have to be flushed.
- Before DMA'ing data from core B L1 memory, caches have to be invalidated.
- Fix lock/unlock.

Signed-off-by: Enrik Berkhan <Enrik.Berkhan@ge.com>
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>

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Enrik Berkhan 2007-12-24 19:51:31 +08:00 • committed by Bryan Wu

parent 37931db5bd

commit 76a7f40492

1 changed files with 8 additions and 4 deletions

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arch/blackfin/mach-bf561/coreb.c

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