arm64: dts: ti: k3-am62p: add opp frequencies

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One power management technique available to the Cortex-A53s is their
ability to dynamically scale their frequency across the device's
Operating Performance Points (OPP)

The OPPs available for the Cortex-A53s on the AM62Px can vary based on
the silicon variant used. The SoC variant is encoded into the
WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register which is used to limit
the OPP entries the SoC supports. A table of all these variants can be
found in its data sheet[0] for the AM62Px processor family.

Add the OPP table into the SoC's fdti file along with the syscon node to
describe the WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register to detect
the SoC variant.

[0] https://www.ti.com/lit/ds/symlink/am62p-q1.pdf

Signed-off-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20241008132052.407994-4-d-gole@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

...

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Bryan Brattlof 2024-10-08 18:50:52 +05:30 • committed by Vignesh Raghavendra

parent 5dae00dfaf

commit 76d855f058

2 changed files with 52 additions and 0 deletions

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arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi

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47

arch/arm64/boot/dts/ti/k3-am62p5.dtsi

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