powerpc/pmem: Update ppc64 to use the new barrier instruction.

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pmem on POWER10 can now use phwsync instead of hwsync to ensure
all previous writes are architecturally visible for the platform
buffer flush.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200701072235.223558-6-aneesh.kumar@linux.ibm.com

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Aneesh Kumar K.V 2020-07-01 12:52:33 +05:30 • committed by Michael Ellerman

parent 3e79f082eb

commit 76e6c73f33

1 changed files with 13 additions and 0 deletions

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arch/powerpc/include/asm/barrier.h

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