drm/i915: Perform Sandybridge BSD tail write under the forcewake

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Since we have a sequence of register reads and writes, we can reduce the
latency of starting the BSD ring by performing all the mmio operations
under the same forcewake wakeref.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1467297225-21379-62-git-send-email-chris@chris-wilson.co.uk

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Chris Wilson 2016-06-30 15:33:45 +01:00

parent 87273b7110

commit 76f8421f2a

2 changed files with 17 additions and 12 deletions

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1

drivers/gpu/drm/i915/i915_drv.h

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28

drivers/gpu/drm/i915/intel_ringbuffer.c

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