arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core

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Add a device node for the second Cortex-A53 CPU core on the Renesas
R-Car V3M (r8a77970) SoC, and adjust the interrupt delivery masks for
ARM Generic Interrupt Controller and Architectured Timer.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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Geert Uytterhoeven 2018-05-09 17:23:22 +02:00 • committed by Simon Horman

parent aa7a6365d0

commit 77899dd2c0

1 changed files with 15 additions and 5 deletions

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arch/arm64/boot/dts/renesas/r8a77970.dtsi

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