drm/amd/display: fix incorrect CM/TF programming sequence in dwb

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[How]
the programming sequeune was for old asic.
the correct programming sequeunce should be similar to the one
used in mpc. the fix is copied from the mpc programming sequeunce.

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Roy Chan <roy.chan@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Roy Chan 2021-07-19 19:00:22 -04:00 • committed by Alex Deucher

parent 4fd771ea44

commit 781e1e2313

1 changed files with 64 additions and 26 deletions

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drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb_cm.c

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