spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controller support

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Add SPI controller driver support for the Quad SPI controller found in
Nuvoton MA35D1 SoCs.

The controller provides two native chip selects and supports standard SPI
and spi-mem operations, including single-bit full-duplex transfers and
dual or quad half-duplex transfers. Implement 8-bit PIO transfers,
per-operation clock configuration, clock and reset handling, and direct
execution of SPI memory operations.

Limit individual transfers to 4 KiB and SPI messages to 8 KiB to keep the
PIO polling path bounded. Read the optional num-cs property and fall back
to the hardware default of two chip selects when it is not present.

Active-high chip select and DMA transfers are not supported by this
initial implementation.

Signed-off-by: Chi-Wen Weng <cwweng@nuvoton.com>
Link: https://patch.msgid.link/20260731023818.1626075-3-cwweng.linux@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>

...

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Chi-Wen Weng 2026-07-31 10:38:18 +08:00 • committed by Mark Brown

parent d458c752cf

commit 78b16af159

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10

drivers/spi/Kconfig

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1

drivers/spi/Makefile

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657

drivers/spi/spi-ma35d1-qspi.c

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