drm/i915/glk: Apply cdclk workaround for DP audio

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Implement the DP-Audio cdclk restriction for GLK, similar to what is
implemented for BDW and other GEN9 platforms. The max. pixel clock
adjustment for GLK, however factors in the 2 pixels per clock output that
GLK generates.

Separating min. cdclk and max. pixel_rate would be nicer, but let's
defer that to future and fix the GLK bug for now.

Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1488931972-2865-1-git-send-email-dhinakaran.pandiyan@intel.com

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Pandiyan, Dhinakaran 2017-03-07 16:12:51 -08:00 • committed by Paulo Zanoni

parent 9f7886d07f

commit 78cfa580f8

1 changed files with 11 additions and 6 deletions

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drivers/gpu/drm/i915/intel_cdclk.c

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