drm/amdgpu: Fix GART page table s-bit

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For the new 2-level GART table, the last PDE0 points
to PTB. Since PTB is in vram and right now we are
runing under s=0 mode (vram is treated as FB carveout),
so the s bit of this PDE0 should be set to 0.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Oak Zeng 2021-01-22 21:51:39 -06:00 • committed by Alex Deucher

parent f4ec3e5039

commit 79194dacb2

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

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