drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range

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Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code.

But presumably Exynos still relies on the DT properties, so take
good use of mode_fixup() in to achieve the compatibility hacks.

Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

...

This commit is contained in:

Yakir Yang 2016-02-15 19:10:11 +08:00

parent 40fc7ce7db

commit 793ce4eb84

3 changed files with 103 additions and 61 deletions

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148

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

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2

drivers/gpu/drm/bridge/analogix/analogix_dp_core.h

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14

drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c

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