clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domain

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This patch adds mout_aclk266_gscl_sub mux clock and adjusts definitions
of GSCL domain gate clocks to use it as their parent, as specified in
SoC documentation.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>

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Tomasz Figa 2013-10-15 19:41:17 +02:00

parent 38ee37540f

commit 796d1f4cd6

1 changed files with 17 additions and 8 deletions

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drivers/clk/samsung/clk-exynos5250.c

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