riscv: correct riscv_insn_is_c_jr() and riscv_insn_is_c_jalr()

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The instructions c.jr and c.jalr must have rs1 != 0, but
riscv_insn_is_c_jr() and riscv_insn_is_c_jalr() do not check for this. So,
riscv_insn_is_c_jr() can match a reserved encoding, while
riscv_insn_is_c_jalr() can match the c.ebreak instruction.

Rewrite them with check for rs1 != 0.

Signed-off-by: Nam Cao <namcaov@gmail.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Fixes: ec5f908775 ("RISC-V: Move riscv_insn_is_* macros into a common header")
Link: https://lore.kernel.org/r/20230731183925.152145-1-namcaov@gmail.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

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Nam Cao 2023-07-31 20:39:25 +02:00 • committed by Palmer Dabbelt

parent 52449c17bd

commit 79bc3f85c5

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1 changed files with 13 additions and 2 deletions

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arch/riscv/include/asm/insn.h

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