clk: renesas: r9a09g057: Fix ordering of module clocks array

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The r9a09g057_mod_clks array is sorted by CPG_CLKON register number and
bit position.  Move the RTC and RSPI module clock entries to their
correct position to restore the array sort order.

Fixes: 2efea3b35c ("clk: renesas: r9a09g057: Add entries for RSCIs")
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260125190314.26729-1-ovidiu.panait.rb@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Ovidiu Panait 2026-01-25 19:03:14 +00:00 • committed by Geert Uytterhoeven

parent 6de23f81a5

commit 79cac2b8dc

1 changed files with 20 additions and 20 deletions

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drivers/clk/renesas/r9a09g057-cpg.c

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